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RF2917
0
Typical Applications * Wireless Meter Reading * Keyless Entry Systems * 433/868/915MHz ISM Band Systems Product Description
The RF2917 is a monolithic integrated circuit intended for use as a low cost FM or FSK receiver. The device is provided in 32-lead plastic packaging and is designed to provide a fully functional FM receiver. The chip is intended for analog or digital applications in the North American 915MHz ISM band and European 433MHz and 868 MHz ISM bands. The integrated VCO, /64 prescaler, and reference oscillator require only the addition of an external crystal to provide a complete phase-locked oscillator for single channel applications. The selection of linear FM output or digital FSK output is done with the mute pin.
433/868/915MHz FM/FSK RECEIVER
* Remote Data Transfers * Wireless Security Systems
IG N S
7.00 + 0.20 sq. 0.22 + 0.05
-A-
0.15 0.05 0.50
E S
Features
RF2917 RF2917 PCBA-L RF2917 PCBA-M RF2917 PCBA-H
5.00 + 0.10 sq. 7 MAX 0 MIN 0.60 + 0.15 0.10
1.40 + 0.05
Dimensions in mm.
W
D
0.127
Optimum Technology Matching(R) Applied
N E
GaAs MESFET Si CMOS SiGe Bi-CMOS
LOOP FLT 29 30 OSC B 31 OSC E 21 RSSI 20 MUTE 22 FM OUT
!
Package Style: LQFP, 32-Pin, 5x5
Si BJT Si Bi-CMOS InGaP/HBT
GaAs HBT SiGe HBT GaN HEMT
R
Phase Detector & Charge Pump Prescaler /64 Linear RSSI
* Fully Monolithic Integrated Receiver * 2.7V to 5.0V Supply Voltage * Narrowband and Wideband FSK * 300MHz to 1000MHz Frequency Range * Power Down Capability * Analog or Digital Output
32
DC BIAS RX IN 2
N O T
LNA OUT 4 MIX IN 6
FO
25 26 RESNTR+ RESNTR-
PD
MIX OUT
8
Ordering Information
433/868/915MHz FM/FSK Receiver Fully Assembled Evaluation Board, 433MHz Fully Assembled Evaluation Board, 868MHz Fully Assembled Evaluation Board, 915MHz Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com
9 IF1 IN-
10 IF1 IN+
11 IF1 BP+
12 IF1 BP-
13 IF1 OUT
16 IF2 IN
17 IF2 BP+
18 IF2 BP-
23 IF2 OUT
24 DEMOD IN
Functional Block Diagram
RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA
NOT FOR NEW DESIGNS
Rev B4 021008
11-139
RF2917
Absolute Maximum Ratings Parameter
Supply Voltage Control Voltages Input RF Level Output Load VSWR Operating Ambient Temperature Storage Temperature
Ratings
-0.5 to +5.5 -0.5 to +5.0 +10 50:1 -40 to +85 -40 to +150
Unit
VDC VDC dBm C C Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).
Overall
RF Frequency Range 300 to 1000 300 to 1000 10
MHz
VCO and PLL Section
VCO Frequency Range PLL Lock Time
MHz ms
PLL Phase Noise Reference Frequency Crystal RS Charge Pump Current 0.5
-74 -98 50 -40 300 to 1000 -101 -55 0.8 to 1.5 13 60
Overall Receive Section
Frequency Range RX Sensitivity LO Leakage RSSI DC Output Range RSSI Sensitivity RSSI Dynamic Range -98
D
25
17 100 +40
W
LNA
Power Gain Noise Figure Input IP3 Input P1dB RX IN Impedance
N E
N O T
Output Impedance
18 16 3.6 3.8 -8 -15 82-j86 77-j43 Open Collector 15 8 17 17 -20 -15.5 -30 -26
FO
R
Mixer
Conversion Power Gain Noise Figure (SSB)
Input IP3 Input IP3 Input P1dB Input P1dB
First IF Section
IF Frequency Range Voltage Gain Noise Figure IF1 Input Impedance IF1 Output Impedance 0.1 10.7 34 13 330 330 MHz dB dB IF=10.7MHz, ZL =330
11-140
E S
dBc/Hz dBc/Hz MHz A MHz dBm dBm V mV/dB dB dB dB dB dB dBm dBm dB dB dB dB dBm dBm dBm dBm
IG N S
MUTE = 0; RL = 51k MUTE = 0 MUTE = 0
Parameter
Specification Min. Typ. Max.
Unit
Condition
T=25 C, VCC =3.6V, Freq=915MHz
The PLL lock time is set externally by the bandwidth of the loop filter and start up of the crystal. 915MHz, 5kHz loop BW, 10kHz offset 915MHz, 5kHz loop BW, 100kHz offset
IF BW=180kHz, Freq=915MHz, S/N=8dB
433MHz, Matched to 50 915MHz, Matched to 50 433MHz 915MHz 915MHz 915MHz 433MHz (see Plots) 915MHz (see Plots) Single-ended configuration 433MHz, Matched to 50 915MHz, Matched to 50 433MHz, SSB Measurement 915MHz, SSB Measurement 433MHz 915MHz 433MHz 915MHz
Rev B4 021008
RF2917
Parameter
Second IF Section
IF Frequency Range Voltage Gain Noise Figure IF2 Input Impedance IF2 Output Impedance Demod Input Impedance Data Output Impedance Data Output Bandwidth Data Output Level 0.1 10.7 60 13 330 1 10 6.3 - j25.7 500 25 MHz dB dB k k k kHz V IF=10.7MHz
Specification Min. Typ. Max.
Unit
Condition
At IF2 OUT- pin 23 Pin 24 ZLOAD=1M || 3pF; 3dB dependent on IF and discriminator BW ZLOAD=1M || 3pF; Output voltage is proportional with the instantaneous frequency deviation.
0.3
VCC -0.3
FM Output DC Level FM Output AC Level
2.6 200 2.0 1.0 25 10.2
Power Down Control
Logical Controls "ON" Logical Controls "OFF" Control Input Impedance Turn On Time
E S D
5.0 12.3 1 V V V mA A
Power Supply
Voltage 2.7 2.4 Current Consumption 9 3.6
N O T
Rev B4 021008
FO
R
N E
W
IG N S
V mVPP V V k ms
Voltage supplied to the input Voltage supplied to the input From PD=1 to valid data out, current eval board Specifications Operating limits Temp>0C RX Mode, MUTE="1" Power Down Mode
11-141
RF2917
Pin 1 Function VCC1 Description
This pin is used to supply DC bias to the receiver RF electronics. A RF bypass capacitor should be connected directly to this pin and returned to ground. A 22pF capacitor is recommended for 915MHz applications. A 100pF capacitor is recommended for 433MHz applications. RF input pin for the receiver electronics. RX IN input impedance is a low impedance when enabled. RX IN is a high impedance when the receiver is disabled. Ground connection for RF receiver functions. Keep traces physically short and connect immediately to ground plane for best performance. Output pin for the receiver RF low noise amplifier. This pin is an open collector output and requires an external pull up coil to provide bias and tune the LNA output. A capacitor in series with this output can be used to match the LNA to 50 impedance image filters. GND2 is connection for the 40 dB IF limiting amplifier. Keep traces physically short and connect immediately to ground plane for best performance. RF input to the RF Mixer. An LC matching network between LNA OUT and MIX IN can be used to connect the LNA output to the RF mixer input in applications where an image filter is not needed or desired. GND3 is the ground connection for the receiver RF mixer.
Interface Schematic
2
RX IN
RX IN
3 4
GND1 LNA OUT
LNA OUT
5 6
GND2 MIX IN
7 8
GND3 MIX OUT
9
IF1 IN-
N E
IF output from the RF mixer. Interfaces directly to 10.7MHz ceramic IF filters as shown in the application schematic. A pull-up inductor and series matching capacitor should be used to present a 330 termination impedance to the ceramic filter. Alternately, an IF tank can be used to tailor the IF frequency and bandwidth to meet the needs of a given application. In addition to the matching components, a 15pF capacitor should be placed from this pin to ground. Balanced IF input to the 40dB limiting amplifier strip. A 10nF DC blocking capacitor is required on this input.
E S
IG N S
330 IF1 IN+
MIX IN
W
D
MIX OUT+
VCC
IF1 BP+ 60 k
IF1 BP60 k 330 IF1 IN-
10 11 12 13
IF1 IN+
FO
IF1 BP+ IF2 BP-
N O T
Functionally the same as pin 9 except non-inverting node amplifier input. In single-ended applications, this input should be bypassed directly to ground through a 10 nF capacitor. DC feedback node for the 40dB limiting amplifier strip. A 100nF bypass capacitor from this pin to ground is required. See pin 11. IF output from the 40dB limiting amplifier. The IF1 OUT output presents a nominal 330 output resistance and interfaces directly to 10.7MHz ceramic filters.
R
See pin 9.
See pin 9. See pin 9.
IF1 OUT
IF1 OUT
14 15
VREF IF GND5
DC voltage reference for the IF limiting amplifiers (typically 1.1V). A 0.1F capacitor from this pin to ground is required. Ground connection for 60dB IF limiting amplifier. Keep traces physically short and connect immediately to ground plane for best performance.
11-142
Rev B4 021008
RF2917
Pin 16 Function IF2 IN Description
Inverting input to the 60dB limiting amplifier strip. A 10 nF DC blocking capacitor is required on this input. The IF2 IN input presents a nominal 330 input resistance and interfaces directly to 10.7MHz ceramic filters.
IF2 IN
Interface Schematic
IF2 BP+ 60 k 330 IF2 BP60 k 330
17 18 19
IF2 BP+ IF2 BPVCC3
DC feedback node for the 60dB limiting amplifier strip. A 100nF bypass capacitor from this pin to ground is required. See pin 17. This pin is used to supply DC bias to the 60dB IF limiting amplifier. An IF bypass capacitor should be connected directly to this pin and returned to ground. A 10 nF capacitor is recommended for 10.7MHz IF applications. This pin is used to select FM, FSK, or mute at the FM OUT pin. MUTE>Vcc - 0.4V turns the FM OUT signal off. MUTE<0.4V turns the FM OUT signal on for FSK digital data. When MUTE is left floating, the FM OUT signal is linear FM.
See pin 16. See pin 16.
20
MUTE
IG N S
RESNTR+
VCC
MUTE
21
RSSI
D
A DC voltage proportional to the received signal strength is output from this pin. The output voltage increases with increasing signal strength.
E S
VCC
RSSI
22
FM OUT
23
IF2 OUT
24
DEMOD IN
FO
R
Demodulated output from the discriminator/demodulator. Output levels on this are CMOS compatible in FSK mode (see pin 20). In linear FM mode, the demodulated signal level is approximately 240mVpp on a DC voltage offset. The magnitude of the load impedance is intended to be 1M or greater. IF output from the 60dB limiting amplifier strip. This pin is intended to be connected to pin 24 through a 5pF capacitor (for 10.7MHz IF applications). This capacitor in conjunction with a tank resonant at the IF frequency connected from pin 24 to ground is used to form an FM discriminator.
N E
W
IF2 OUT
This pin is the input to the FM demodulator. This pin is NOT AC coupled. Therefore, a DC blocking capacitor is required on this pin to avoid a DC path to ground. A DC blocked LC tank resonant at the IF or ceramic discriminator should be connected to this pin.
DEMOD IN
VCC
10 k
N O T
25
RESNTR-
This port is used to supply DC voltage to the VCO as well as to tune the center frequency of the VCO. Equal value inductors should be connected to this pin and pin 26.
RESNTR
26 27
RESNTR+ VCC2
See pin 25. This pin is used to supply DC bias to the VCO, prescaler, and PLL. An IF bypass capacitor should be connected directly to this pin and returned to ground. A 10nF capacitor is recommended for 10.7MHz IF applications. GND4 is the ground shared on chip by the VCO, prescaler, and PLL electronics.
See pin 25.
28
GND4
Rev B4 021008
11-143
RF2917
Pin 29 Function LOOP FLT Description
Output of the charge pump, and input to the VCO control. An RC network from this pin to ground is used to establish the PLL bandwidth.
Interface Schematic
VCC
LOOP FLT
30
OSC B
This pin is connected directly to the reference oscillator transistor base. The intended reference oscillator configuration is a modified Colpitts. A 100pF capacitor should be connected between pin 30 and pin 31.
OSC B OSC E
31 32
OSC E PD ESD
N O T
11-144
FO
R
N E
W
D
E S
This pin is connected directly to the emitter of the reference oscillator transistor. A 100pF capacitor should be connected from this pin to ground. This pin is used to power up or down the RF2917. A logic high (PWR DWN >2.0 V) powers up the receiver and PLL. A logic low (PWR DWN <1.0 V) powers down circuit to standby mode. This diode structure is used to provide electrostatic discharge protection to 3kV using the Human body model. The following pins are protected: 1, 3, 5, 7-19, 21-24, 27-31.
IG N S
See pin 30.
VCC
Rev B4 021008
RF2917
RF2917 Theory of Operation and Application Information
The RF2917 is part of a family of low-power RF transceiver IC's developed for wireless data communication devices operating in the European 433/868MHz ISM bands or the U.S. 915MHz ISM band. This IC has been implemented in a 15GHz silicon bipolar process technology that allows low-power transceiver operation in a variety of commercial wireless products. The RF2917 realizes a highly integrated, single-conversion FM/FSK receiver with the addition of a reference crystal, intermediate frequency (IF) filtering, and a few passive components. The LNA (low noise amplifier) input of the RF2917 is easily matched to a front-end filter or antenna by means of a DC blocking capacitor and reactive components. The receiver local oscillator (LO) is generated by an internalized VCO, PLL and phase discriminator in conjunction with the external reference crystal, loop filter and VCO resonator components. The receiver IF section is optimized to interface with low cost 10.7MHz ceramic filters, and its -3dB bandwidth of 25MHz also allows it to be used (with lower gain) at higher frequencies with other types of filters. FM/FSK SYSTEMS The receiver output functionality is determined by the tri-state MUTE input. The three output configurations are linear FM, FSK and mute. An on-chip 1.6MHz RC filter, which follows the demodulator output, filters the harmonics of the IF signal from the output data. AM SYSTEMS The RF2919 is recommended for use in ASK/OOK applications, however, the RF2917 may be utilized in an AM system by using the RSSI (received signal strength indicator) output to recover the modulation. The FM output mode should be selected for AM operation because of the higher RSSI resolution in FM mode. RSSI The RSSI output signal is supplied from a current source and therefore requires a resistor to convert it to a voltage. The RSSI is linear over the same range of input power for both FM and FSK modes, but the FM mode has higher RSSI resolution. For a 51k resistive load, the RSSI will range from 1.0V to 2.6V in FM mode and from 0.8V to 1.5V in FSK mode (3.6V supply). A small parallel capacitor is suggested to limit the bandwidth and filter noise. APPLICATION AND LAYOUT CONSIDERATIONS The RX IN pin is DC-biased, requiring a DC blocking capacitor. If the RF filter has DC blocking characteristics, such as a ceramic dielectric filter, then a DC blocking capacitor is not necessary. When in power down mode, the RX IN impedance increases. Therefore, in a half-duplex application, the RF2917 RX IN may share the RF filter with a transmitter output having a similar high impedance power down characteristic. Care must be taken in this case to account for loading effects of the transmitter on the receiver, and vice versa, in matching the filter to both the transmitter and receiver. The VCO is a very sensitive block in this system. RF signals feeding back into the VCO by either radiation or coupling of traces may cause the PLL to become unlocked. The trace(s) for the anode of the tuning varactor should also be kept short. The layout of the resonators and varactor are very important. The capacitor and varactor should be closest to the RF2917 pins and the trace length should be as short as possible. The inductors can be placed further away and any trace inductance can be compensated by reducing the value of the inductors. Printed inductors may also be used with careful design. For best results, the physical layout should be as symmetrical as possible. When using loop bandwidths lower than the 5kHz shown on the evaluation board, better supply filtering at the resonators (and lower VCC noise as well) will help reduce the phase noise of the VCO; a series resistor of 100 to 200 and a 1F or larger capacitor 11-145
When in the FM mode, the FM OUT signal is the buffered output from the quadrature demodulator. The output signal has a fixed DC offset of VCC -1.0V, while the AC level is dependent on the FM deviation, with a maximum level of 240mVP-P. For optimum operation in either FM or FSK mode, FM deviation needs to exceed (with margin) the carrier frequency error anticipated between the receiver and transmitter.
N O T
When in the FSK mode, the FM OUT signal is clipped, having a rail-to-rail output level. The FM OUT pin is only capable of driving rail-to-rail output into a very high impedance and small capacitance, with the amount of capacitance determining the FM OUT bandwidth. For a 3pF load, the bandwidth is in excess of 500kHz. The rail-to-rail output is also limited by the frequency deviation and bandwidth of the IF filters. With the 180kHz bandwidth filters on the evaluation boards, the rail-to-rail output is limited to less than 140kHz. Choosing the right IF bandwidth and deviation versus data rate (modulation index) is important in evaluating the applicability of the RF2917 for a given data rate.
Rev B4 021008
FO
R
N E
W
D
E S
IG N S
RF2917
may be used. Phase noise is generally more critical in narrowband applications where adjacent channel selectivity is a concern, but it can also contribute to raising the noise floor of the receiver, thereby degrading sensitivity. For the interface between the LNA and mixer, the coupling capacitor should be as close to the RF2917 pins as possible, with the bias inductor being further away. Once again, the value of the inductor may be changed to compensate for trace inductance. The output impedance of the LNA is on the order of several k, which makes matching to 50 difficult. If image filtering is desired, a high impedance filter is recommended. If no filtering is used, the match to the mixer input need not be a good conjugate match, because of the high gain of the IF amplifier stages. In fact, a conjugate match between the LNA and mixer will not significantly improve sensitivity, but will have an adverse effect on system IIP3 and increase the likelihood of IF instability. Because of the high gain of the IF section, care should be taken in laying out the IF filtering and discriminator components to minimize the possibility of instability. In particular, inductive feedback may occur between the inductor of a discrete (LC) discriminator and any inductor(s) in the IF interstages. Orthogonal placement of inductors will generally minimize coupling. Indicators that an instability may exist include poor sensitivity and a high RSSI level when no input signal is present. PREDICTING AND MINIMIZING PLL LOCK TIME The RF2917 implements a conventional on-chip PLL. The VCO is followed by a prescaler, which divides down the output frequency for comparison with the reference oscillator frequency. The output of the phase discriminator is a sequence of pulse width modulated current pulses in the required direction to steer the VCO's control voltage to maintain phase lock, with a loop filter integrating the current pulses. The lock time of this PLL is a combination of the loop transient response time and the slew rate set by the phase discriminator output current, combined with the magnitude of the loop filter capacitance. A good approximation for total lock time of the RF2917 is:
where D is a factor to account for the loop damping, FC is the loop cut frequency, C is the sum of all shunt capacitors in the loop filter, and dV is the required step voltage change to produce the desired frequency change during the transient. For loops with low phase margin (30 to 40), use D=2, whereas for loops with better phase margin (50 to 60), use D=1. To lock faster, C needs to be minimized. 1. Design the loop filter for the minimum phase margin possible without causing loop instability problems; this allows C to be kept at a minimum. 2. Design the loop filter for the highest loop cut frequency possible without distorting low frequency modulation components; this also allows C to be kept at a minimum.
The quadrature tank of the discriminator may be implemented with ceramic discriminators available from a variety of sources. This design works well for wideband applications, and where the temperature range is limited. The temperature coefficient of a ceramic discriminator may be on the order of +50ppm/C. An automatic frequency control loop may be implemented using the DC level of the FM OUT for feedback to an external varactor on the reference crystal. An alternative to the ceramic discriminator is an LC tank. The DEMOD IN pin has a DC bias and must be DC-blocked. This can be done either at the pin or at the ground side of the LC tank (this must also be done if a parallel resistor is used with a ceramic discriminator). The decision whether to use an LC or a ceramic discriminator should be based on the frequency deviation in the system, discriminator Q needed, and frequency and temperature tolerances. Tuning of the LC tank is required to overcome the component tolerances in the tank.
N O T
11-146
FO
R
N E
W
D
E S
IG N S
DLockTime = ------ + 35000 C dV FC
Rev B4 021008
RF2917
Pin Out
LOOP FLT RESNTR+ 26 RESNTR25 24 DEMOD IN 23 IF2 OUT 22 FM OUT 21 RSSI 20 MUTE 19 VCC3 18 IF2 BP17 IF2 BP+ 16 IF2 IN
OSC E
OSC B
GND4 28
32 VCC1 1 RX IN 2 GND1 3 LNA OUT4 GND2 5 MIX IN 6 GND3 7 MIX OUT8 9
31
30
29
27
VCC2 VREF IF 14
PD
IF1 OUT
IF1 BP+
IF1 BP-
IF1 IN+
IF1 IN-
10
11
D
12 13
N O T
Rev B4 021008
FO
R
N E
W
GND5
E S
15
IG N S
11-147
RF2917
915MHz Application Schematic
VCC 100 22 pF 10 nF 6.8 nH 6.8 nH
D1
3 pF PD VCC 10 10 nF 22 pF 1 Filter 2 3 10 10 nF 12 nH 4 22 pF 10 pF 5 6 10 10 nF 6.8H 8 22 pF 15 pF 9 22 pF 10 nF Filter D1 : SMV1233-011 10 11 12 32 DC BIAS 25 26 3.9 k 29
3.3 nF 2.7 k
47 nF
IG N S
31 21 20 22 24 5 pF 14 0.1F 18 23
Phase Detector & Charge Pump
14.15099 MHz 30
47 pF 47 pF
VCC
Prescaler /64
RSSI 10 pF
51 k
VCC
E S
Linear RSSI
MUTE
FM OUT
D
13 16 Filter
17
10 nF 10 nF
10 nF 10 nF
N O T
11-148
FO
R
N E
W
Rev B4 021008
RF2917
Evaluation Board Schematic H (915MHz), M (868MHz), L (433MHz) boards
(Download Bill of Materials from www.rfmd.com.)
VCC R9 10 C27 10 nF C28 47 pF L7* L6* C30 3.3 nF R10 3.9 k R11 2.7 k C31 47 nF X1* 32 1 J1 RF IN 50 strip 2 C4* L1* R2 10 VCC C6 10nF VCC R4 10 C11 10 nF C12 47 pF L4 6.8 H C9 15 pF C13 22 pF RSW2** R12 0 F1
SFECV10.7MS3S-A-TC fO=10.7 MHz BW=180 kHz
PD VCC
R1 10 C1 10 nF C2 47 pF C3 4.7 F
C29*
D1***
VCC Ctrim* 3-10 pF
26
25
29 Phase Detector & Charge Pump
28
27 30 C32* C33*
C5* 3 L2* 4
IG N S
31 21 C23 10 pF Prescaler /64 20 19 C21 47 pF 22 24 17 18 23 U2 (10.7 MHz)
CDF107B-A0-001
DC BIAS
RSSI R7 51 k MUTE R6 10 VCC C22 10 nF J3 DATA OUT C24 100 pF
C7 47 pF
R13* C8* 5 6 7 8 9 10 11 C16 10 nF 12
Linear RSSI
13 C17 10 nF
J2 IF OUT
50 strip
C15 10 nF
D
C18 10 nF
C14 68 pF L5 10 H
E S
14 15 16 C19 10 nF C20 10 nF
C25 4 pF
R8 1.5 k
C26 10 nF
W
P1 F2 P1-1 1 2 P1-3 3 PD GND VCC P2-3 P2-1
P2 1 2 3 RSSI GND MUTE
Drawing 2917400C, 401-, 402-
*See table for values. **Components not normally populated. ***D1 : SMV1233-011 Board
N E
C4 (pF) 2 L1 (nH) 27
SFECV10.7MS3S-A-TC fO=10.7 MHz BW=180 kHz
C5 (pF) 100 100 22
L2 (nH) 33 12 12
R13 () 510 -
C8 (pF) 9 1 1
L6 (nH) 18 6.8 6.8
L7 (nH) 18 6.8 6.8
C29 (pF) 9 3 3
X1 (MHz) 6.612813 13.41015 14.15099
C32 (pF) 100 100 47
C33 (pF) 100 100 47
L (433MHz)
R
H (915MHz)
M (868MHz)
1.5 2
8.2 6.8
N O T
Rev B4 021008
FO
11-149
RF2917
Evaluation Board Layout - M and H Board Size 2.0" x 2.0"
Board Thickness 0.040", Board Material FR-4, Multi-Layer (Same board layout is being used for the -M and -H versions.)
N O T
11-150
FO
R
N E
W
D
E S
Rev B4 021008
IG N S
RF2917
Evaluation Board Layout - L Board Size 2.0" x 2.0"
Board Thickness 0.048", Board Material FR-4, Multi-Layer
N O T
Rev B4 021008
FO
R
N E
W
D
E S
IG N S
11-151
RF2917
12.0 Vcc=2.70 Vcc=3.60 11.0
Current versus Temperature RX Frequency = 915MHz
-90.0
Sensitivity versus Temperature RX Frequency = 915MHz
Vcc=2.70 Vcc=3.60
10.0
9.0
8.0
Sensitivity (dBm)
-100.0
Current (mA)
-110.0
7.0
6.0 -40.0 -30.0 -20.0 -10.0 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0
-120.0
-40.0 -30.0 -20.0 -10.0 0.0
Temperature (C)
E S
1.0
6 0.
FSK Mode FM Mode 2.5
0.8
3.0
RSSI versus Input Power RLOAD = 51k, VCC = 3.6V, TA = 25C
IG N S
Temperature (C)
0.2 0.4 0.6 0.8 1.0 0
10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0
LNA Impedance
Swp Max 1GHz
2. 0
D
RSSI (Volts)
W
2.0
3.0
4.0
N E
1.0
0.5
LNA Input (RX off)
.4 -0
LNA Output
.0 -2
-0.8
N O T
11-152
FO
Input Power (dBm)
-1.0
-130.0 -120.0 -110.0 -100.0 -90.0
-80.0
-70.0
-60.0
-50.0
-40.0
-30.0
-0 .6
0.0
R
Swp Min 0.3GHz
Rev B4 021008
-4 .0 -5. 0
2 -0.
-10.0
LNA Input (RX on)
5.0
1.5
10.0
-3 .0
0.2
2.0
0. 4
0 3.
0 4.
5.0
10.0

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